Layout-Designs of Integrated Circuits Protection Act

This Act regulates the legal protection of layout-designs of integrated circuits.

(1) The legal protection of layout-designs of integrated circuits is provided for in this Act, other Acts and regulations issued by the Government of the Republic and the Ministers on the basis and for the implementation of such Acts.

(2) The legal protection of layout-designs of integrated circuits provided for in this Act is independent of the protection provided for in the Copyright Act.

(3) If a legal act regulating the legal protection of layout-designs of integrated circuits is contrary to an international agreement ratified by the Riigikogu, the provisions of the international agreement apply.

The rights and obligations prescribed in this Act and other legislation regulating the legal protection of layout-designs of integrated circuits apply equally to natural and legal persons of the Republic of Estonia and of foreign states (hereinafter persons), considering the restrictions provided for in this Act regarding persons of foreign states.

For the purposes of this Act, an “integrated circuit” means a product, in its final form or intermediate form, in which the elements, at least one of which is an active element, and some or all of the interconnections are integrally formed in or on a piece of material and which is intended to perform an electronic function.

For the purposes of this Act, the “layout-design of an integrated circuit” means the three-dimensional disposition, however expressed, of the elements, at least one of which is an active element, and of some or all of the interconnections of an integrated circuit, or such reproduction of three-dimensional disposition prepared for an integrated circuit intended for manufacture.

(1) For the purposes of this Act, “commercial exploitation” means the transfer or grant of use, for a charge, of a layout-design of an integrated circuit or the integrated circuit composed on the basis thereof and the offer for transfer or grant of use for a charge, importation or distribution in another manner of a layout-design of an integrated circuit or the integrated circuit composed on the basis thereof, including distribution as part of a product.

(2) Confidential use upon which the layout-design of an integrated circuit is not available to third persons is not deemed to be commercial exploitation.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

For the purposes of this Act, “reproduction” means the copying of the layout-design of an integrated circuit in whichever manner, including copying for the purpose of manufacturing the integrated circuit.

(1) Layout-designs of integrated circuits which are original and have not been commercially exploited in any part of the world for more than two years prior to the filing of the layout-design of the integrated circuit for registration in the register of layout-designs of integrated circuits (hereinafter also the register) are granted legal protection.

(2) Layout-designs of integrated circuits are original if they are the result of their creators’ creative activities and are not commonplace among experts creating and manufacturing layout-designs of integrated circuits at the time of their creation.

(3) A complete layout-design of an integrated circuit consisting of commonplace layout-designs of integrated circuits is granted legal protection if it, taken as a whole, complies with the requirements provided for in subsection 1 of this section.

(4) A part of a layout-design of an integrated circuit is granted legal protection if such part performs a clearly determined electronic function and complies with the requirements provided for in subsection 1 of this section.

(5) Legal protection does not extend to the technology of manufacturing integrated circuits or layout-designs of integrated circuits or to information recorded therein.

(6) Legal protection is granted by registration of the layout-design of an integrated circuit in the register pursuant to the procedure provided for in this Act.

(7) The identification documents of the layout-design of an integrated circuit which is entered in the register shall be the basis for determining the scope of legal protection of the layout-design of the integrated circuit. The layout-design of an integrated circuit represented in the identification documents is deemed to have acquired legal protection.

(8) Legal protection is not granted to the layout-design of an integrated circuit which, within fifteen years as of the fixation of the moment of creation, has not been

1) filed for registration in the register;

2) commercially exploited in any part of the world by the person who has filed an application for registration of the layout-design of the integrated circuit in the register or with the consent of such person.

[RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) The legal protection of the layout-design of an integrated circuit is granted for ten years and terminates ten calendar years after the last calendar day of the initial year of the legal protection of the layout-design of the integrated circuit.

(2) The date of the first commercial exploitation in any part of the world of the layout-design of an integrated circuit, if an application for registration of the layout-design of the integrated circuit in the register is filed within two years from such date, is deemed to be the date of commencement of the legal protection of the layout-design of the integrated circuit.

(3) If the layout-design of an integrated circuit has not been commercially used in any part of the world prior to its filing for registration in the register, the filing date of the application is deemed to be the commencement of legal protection.

(1) The author of the layout-design of an integrated circuit is the natural person who created the layout-design of the integrated circuit through his or her creative activities.

(2) If the layout-design of an integrated circuit is created by several natural persons through joint creative activities, such persons are joint authors.

(3) In the case of joint authorship, all rights are exercised by the authors jointly, unless they agree otherwise in writing.

(4) Authorship is inalienable and unspecified in term.

(1) The author of the layout-design of an integrated circuit has the following moral rights

1) the right to request the disclosure of the author’s name as the author;

2) the right to prohibit the disclosure of the author’s name as the author;

3) the right to revoke at any time the prohibition on disclosure of the author’s name.

(2) The moral rights of the author of the layout-design of an integrated circuit are inseparable from the author’s person and are non-transferable during the lifetime of the author.

(3) The economic right of the author of the layout-design of an integrated circuit is the right to a fair portion of the profit received from the reproduction and commercial exploitation of the layout-design of the integrated circuit. The economic rights of the author of the layout-design of an integrated circuit are transferable.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

(1) The right to apply for registration of the layout-design of an integrated circuit and to become the owner of the layout-design of the integrated circuit is vested in the author or person who has acquired the right to apply for registration of the layout-design of the integrated circuit from the author or by way of transfer of such right.

(2) The right to apply for registration and ownership of the layout-design of an integrated circuit created in the performance of duties of employment or contractual obligations is vested in the employer or customer, unless otherwise provided for in the duties of employment or a contract.

(3) Several persons may apply for registration of the layout-design of an integrated circuit jointly.

(4) Persons specified in subsection 1 or 2 of this section may only apply for registration of such layout-designs of integrated circuits which comply with the provisions of subsections 1–4 of § 8 of this Act.

(1) The right to apply for registration of the layout-design of an integrated circuit may be exercised by a person who complies with the requirements provided for in § 12 of this Act and who is the citizen of the Republic of Estonia or a state party to the Agreement Establishing the World Trade Organisation (hereinafter Member State of the WTO) or whose residence or seat is in the Republic of Estonia or a Member State of the WTO or who was the first to commercially exploit the layout-design of the integrated circuit in the Republic of Estonia or a Member State of the WTO, or the legal successor of such person.

(2) A person who complies with the requirements provided for in § 12 of this Act but who is not a citizen of the Republic of Estonia or a Member State of the WTO or whose residence or seat is not in the Republic of Estonia or a Member State of the WTO or who was not the first to commercially exploit the layout-design of the integrated circuit in the Republic of Estonia or a Member State of the WTO may exercise the right to apply for registration of the layout-design of an integrated circuit only on the basis of multilateral international agreements.

The owner of the layout-design of an integrated circuit is the person who is entered in the register as the owner of the layout-design of the integrated circuit. The owner of the layout-design of an integrated circuit has the exclusive right to the registered layout-design of the integrated circuit.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

(1) The owner of the layout-design of an integrated circuit has the exclusive right to reproduce and commercially exploit the layout-design of the integrated circuit.

(2) The owner of a layout-design of an integrated circuit has the right to

1) prohibit other persons from reproducing or commercially exploiting the layout-design of the integrated circuit without the owner’s consent;

2) demand persons who infringe the rights provided for in subsection 1 of this section to terminate the infringement of such rights, eliminate the consequences of the infringement and compensate for the damage caused by the infringement;

3) demand persons who have acquired in good faith an integrated circuit containing a registered layout-design of an integrated circuit that has been distributed without the consent of the owner of the layout-design of the integrated circuit to pay compensation for further commercial exploitation of the integrated circuit after notifying such person of the owner’s rights. The extent of further commercial exploitation of the integrated circuit shall be the basis for determining the amount of compensation;

4) use the capital letter “T” as the symbol for a registered layout-design of an integrated circuit in marking an integrated circuit which contains the registered layout-design of the integrated circuit and in publications describing the layout-design of the integrated circuit.

(3) The rights of the owner of the layout-design of an integrated circuit may only be restricted in the cases and pursuant to the procedure prescribed by law.

The following acts do not constitute an infringement of the rights of the owner of the layout-design of an integrated circuit

1) non-commercial use of the layout-design of an integrated circuit;

2) reproduction of the layout-design of an integrated circuit for the purposes of analysis, study or teaching;

3) commercial exploitation of the layout-design of an integrated circuit obtained as a result of the activity specified in clause 2 of this section, if such layout-design of the integrated circuit complies with the requirements provided for in subsections 1–4 of § 8 of this Act;

4) independent creation of an identical layout-design of an integrated circuit by a third person.

The owner of the layout-design of an integrated circuit has no right to prohibit further commercial exploitation of an integrated circuit which contains a registered layout-design of an integrated circuit when the integrated circuit has been put on the market in the territory of the Republic of Estonia or a State party to the Agreement of the European Economic Area by the owner of the layout-design of the integrated circuit or with the owner’s consent.

An application for registration of the layout-design of an integrated circuit (hereinafter registration application) may contain only one layout-design of the integrated circuit.

(1) A registration application shall consist of the following documents

1) a request for registration of the layout-design of an integrated circuit;

2) identification documents of the layout-design of the integrated circuit;

3) [repealed – RT I, 06.01.2023, 2 – entry into force 31.08.2023]

4) a power of attorney if the applicants have a joint representative and the request for the registration of the layout-design of an integrated circuit has not been signed by all the applicants.

[RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(2) Other documents deemed necessary by the applicant for registration of a layout-design of an integrated circuit (hereinafter applicant) may be added to a registration application.

(3) If documents added to a registration application pursuant to subsection 2 of this section contain a trade secret, the applicant may prohibit the disclosure of the trade secret.

A request for registration of the layout-design of an integrated circuit shall set out

1) a request for registration of the layout-design of an integrated circuit;

2) the name of the layout-design of an integrated circuit;

3) a request for the date of commencement of legal protection of the layout-design of the integrated circuit to be determined according to the date of its first commercial exploitation;

4) definition of information not subject to disclosure pursuant to subsection 3 of § 19 of this Act;

5) the given name, surname and the address of the residence or seat of the enterprise of the applicant if the applicant is a natural person, or the name and address of the applicant if the applicant is a legal person;

6) information on the right to apply for registration of the layout-design of the integrated circuit pursuant to the provisions of subsections 1 and 2 of § 12 of this Act;

7) the given name, surname and address of the author;

8) prohibition on disclosure of the given name, surname and address of the author if the author has prohibited disclosure thereof;

9) the given name and surname of the patent attorney if the application is filed via a patent attorney;

10) the given name and surname of the representative if the representative is a natural person, or the name of the representative if the representative is a legal person, if the applicants have a joint representative;

11) the correspondence address or the e-mail address of the applicant;

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

12) the signature of the applicant, patent attorney or joint representative.

(1) The identification documents of the layout-design of an integrated circuit shall give a clear and complete depiction of the layout-design of the integrated circuit.

(2) The identification documents of the layout-design of an integrated circuit may include drawings or photos of the layout-design of the integrated circuit, mask or a part thereof with which the integrated circuit is composed or can be composed and the different layers of the integrated circuit.

(3) If the layout-design of an integrated circuit filed for registration is only a part of the layout-design depicted on the documents specified in subsection 2 of this section, the part filed for registration shall be clearly distinguishable.

(1) Registration applications shall be filed with the Patent Office.

(2) [Repealed – RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(3) A state fee for the filing of a registration application shall be paid within two months after the filing date of the registration application. The term for payment of the state fee cannot be extended or restored.

(4) The power of attorney of a joint representative is submitted on the date of receipt of the registration application or within two months after the date of receipt of the registration application.

[RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(5) A request for determining the date of commencement of legal protection of the layout-design of an integrated circuit on the basis of the date of its first commercial exploitation shall be filed on the date of receipt of the registration application.

(6) The requirements for the format of registration application documents and the procedure for filing registration applications shall be established by the minister in charge of the policy sector.

[RT I, 28.12.2011, 1 – entry into force 01.01.2012]

(1) Acts related to legal protection of layout-designs of integrated circuits are performed at the Patent Office and at the Industrial Property Board of Appeal (hereinafter Board of Appeal) by interested persons or patent attorneys representing them, who have been awarded patent attorney qualifications for operating in the area of inventions and layout-designs of integrated circuits pursuant to the Patent Attorneys Act. An interested person or patent attorney may involve, at own expense, an interpreter or adviser without the right of representation in an oral procedure at the Patent Office or at the Board of Appeal.

[RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(2) A person with no residence or seat in the Republic of Estonia shall authorise a patent attorney as the person’s representative for performing acts related to legal protection of layout-designs of integrated circuits at the Patent Office and at the Board of Appeal, except for filing of a registration application and payment of all the state fees specified in this Act.

(3) If acts related to legal protection of layout-designs of integrated circuits are performed at the Patent Office and at the Board of Appeal by several persons together, they may authorise a patent attorney as their representative or appoint a representative from among themselves (hereinafter joint representative) whose residence or seat is in the Republic of Estonia.

[RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(4) A patent attorney performing acts related to legal protection of layout-designs of integrated circuits as a representative at the Patent Office or at the Board of Appeal is presumed to have the right of representation. In case of doubt as to the existence of the right of representation, the Patent Office or the Board of Appeal has the right to require the patent attorney to submit a power of attorney. The power of attorney must be submitted within two months after the request is presented. In case of a reasoned application, the Patent Office may extend the term for submission of the power of attorney once by one month.

[RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(5) The personal participation by an applicant or owner of the layout-design of the integrated circuit in a procedure concerning an act related to legal protection of layout-designs of integrated circuits is not deemed to constitute renouncement of a representative, unless the principal informs the Patent Office otherwise in writing.

[RT I, 06.01.2023, 2 – entry into force 16.01.2023]

(1) The Patent Office forwards the notices relating to an act concerning the legal protection of layout-designs of integrated circuits to the representative of the applicant, the owner of the layout-design of the integrated circuit or any other person requesting the act to be performed, unless the principal has informed the Patent Office otherwise in writing, and, in the absence of a representative, to the person themselves.

(2) For the purposes of subsection 1 of this section, a representative is a person who has filed a patent application or a request as a representative of the applicant, the owner of the layout-design of the integrated circuit or any other person requesting the act to be performed, or who has performed other acts in the proceedings of the Patent Office, or who is entered in the register as a representative of the applicant or the owner of the layout-design of the integrated circuit, unless the principal has informed the Patent Office otherwise in writing.

(3) Where a person has several representatives for the purposes of subsection 2 of this section, the notices are forwarded to the most recently communicated representative, and if several representatives were communicated on the same date, the representative who is a patent attorney is preferred. If persons performing acts together have different representatives, the notices are forwarded to all the representatives.

(4) In the case of an applicant, the owner of the layout-design of the integrated circuit or any other person who has indicated an e-mail address in the registration application or in the request, and in the case of a patent attorney, the consent is presumed to be given by transmission to them of notices relating to an act concerning the legal protection of layout-designs of integrated circuits by electronic means, unless the person has informed the Patent Office otherwise in writing.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(1) A power of attorney may be in unattested written form.

(2) A power of attorney shall set out the following

1) the given name, surname and the address of the residence or seat of the enterprise of the person represented if the person is a natural person, or the name and address of the person represented if the person is a legal person;

2) in the case of a patent attorney, the given name and surname of the patent attorney;

3) in the case of a joint representative who is a natural person, the given name, surname and the address of the residence or seat of the enterprise of the representative or, in the case of a joint representative who is a legal person, the name of the representative;

4) the scope of authorisation;

5) right to delegate authorisation, if the person represented grants such right to the representative;

6) the term of authorisation, if the power of attorney is granted for a specified term;

7) the signature of the person represented;

8) the place and date of issue of the power of attorney.

Pursuant to Article 12 (1) of the Paris Convention for the Protection of Industrial Property (RT II 1994, 4/5, 19), registration applications are processed by the Patent Office.

(1) Upon receipt of a registration application, the Patent Office shall mark every document of the registration application with a notation of receipt. The notation of receipt shall contain

1) the date of receipt of the registration application;

2) the sequence number of receipt of the registration application (hereinafter registration application number).

(2) [Repealed – RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(3) The date of receipt of a registration application by the Patent Office is deemed to be the filing date of the registration application if at least the following documents are filed on the date of receipt

1) a request for registration of the layout-design of an integrated circuit;

2) identification documents of the layout-design of the integrated circuit;

3) information allowing the identity of the applicant to be established or allowing the applicant to be contacted by the Patent Office.

(4) If a registration application meets the requirements provided for in subsection 3 of this section upon its receipt by the Patent Office, the date of receipt of the registration application by the Patent Office shall be deemed to be the filing date of the application.

(5) If any information specified in subsection 3 of this section is missing from an application, the applicant is notified thereof and a term of two months is set for elimination of deficiencies. The Patent Office is not required to give notice if the filed documents do not contain the name and address or e-mail address of the applicant or the name of the representative of the applicant.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(6) If the name and address or e-mail address of an applicant or the name of the representative of the applicant is missing, the applicant must, on own initiative, file all the documents and information specified in subsection 3 of this section within two months as of the date of receipt of the initially filed documents by the Patent Office.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(7) If an applicant files the missing documents and information relating to the registration application within a term set pursuant to subsection 5 of this section or, if subsection 6 applies, within the term provided for therein, the date on which all the documents and information specified in subsection 3 are submitted to the Patent Office shall be deemed the filing date of the registration application.

(8) The filing date of a registration application shall not be established if the applicant fails to submit the missing documents and information relating to the registration application to the Patent Office within the term prescribed in the cases provided for in subsections 5 and 6 of this section.

(9) A registration application the filing date of which is established pursuant to subsection 4 or 7 of this section shall be accepted for processing. The Patent Office shall notify the applicant of the filing date and number of the registration application.

[RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) The Patent Office shall refuse to accept a registration application for processing if the filing date of the registration application is not established pursuant to subsection 8 of § 26 of this Act.

(2) The Patent Office makes a decision on refusal to accept a registration application for processing and notifies the applicant thereof. The applicant is entitled to a refund of the paid state fee.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

[Repealed RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) The Patent Office shall verify

1) the existence of the registration application documents provided for in § 19 of this Act and their compliance with the requirements for form;

2) the compliance of the contents of the registration application documents with the provisions of §§ 18, 20 and 21 of this Act;

(2) The Patent Office does not examine

1) compliance of the layout-design of an integrated circuit with the provisions of subsections 1–4 of § 8 of this Act;

2) the right of the applicant to apply for registration of the layout-design of an integrated circuit pursuant to the provisions of subsections 1 and 2 of § 12 of this Act.

(3) If an applicant files a request, on the basis of subsection 2 of § 9 of this Act, for determining the date of commencement of legal protection of the layout-design of an integrated circuit based on the date of its first commercial exploitation, the Patent Office shall determine such date.

(4) The Patent Office informs the applicant of deficiencies in the contents or form of the registration application documents or of any other circumstances which hinder the processing thereof and establishes a term of two months for elimination of the deficiencies or provision of explanations.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(5) The Patent Office extends, on the basis of a request from the applicant, the term for elimination of deficiencies in a registration application or for provision of explanations by up to six months from the beginning of the term specified in subsection 4 of this section. The request must be filed and the state fee must be paid before the end of the term established in subsection 4 of this section.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

An applicant may correct and supplement a registration application during processing provided that such corrections and supplements do not alter the layout-design of the integrated circuit which was applied for in the registration application at the filing date of the registration application.

(1) An applicant may withdraw a registration application during processing by filing a corresponding written request. A registration application is deemed to be withdrawn from the date of receipt of the request by the Patent Office. Registration application documents are not returned.

(2) The Patent Office deems a registration application to be withdrawn if the applicant fails to respond to a demand of the Patent Office to eliminate deficiencies in the registration application or to provide explanations by the end of the term established pursuant to subsections 4 or 5 of § 29 of this Act.

(1) Where a registration application is withdrawn or deemed to be withdrawn, the processing of the registration application is terminated and the applicant is notified thereof.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(2) [Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) An applicant may request the resumption of the processing of a registration application that has been terminated if the applicant failed to respond to the demand of the Patent Office to eliminate deficiencies in the registration application or to provide explanations by the end of the term established pursuant to subsection 4 or 5 of § 29 of this Act due to force majeure or some other impediment independent of the applicant or the applicant’s representative.

(2) A request for the resumption of the processing of a registration application may be filed within one year after the end of the term established pursuant to subsection 4 or 5 of § 29 of this Act. The state fee must be paid upon filing the request.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(3) The Patent Office resumes the processing of a registration application if the applicant proves the existence of force majeure or some other impediment beyond the control of the applicant or the applicant’s representative and responds to the demand of the Patent Office to eliminate deficiencies in the registration application or to provide explanations within two months after the force majeure or other impediment ceases to exist. The applicant is notified of the resumption of the processing of the registration application.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(1) If a registration application is in compliance with the requirements of §§ 18–21 of this Act, the Patent Office makes a decision on registration of the layout-design of an integrated circuit without verifying the right of the applicant to file the application, the correctness of the facts presented in the application or the originality of the layout-design of the integrated circuit and notifies the applicant thereof.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(2) [Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(3) [Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) If a registration application is not in compliance with the provisions of §§ 18–21 of this Act, the Patent Office shall make a decision on refusal to register the layout-design of an integrated circuit and shall notify the applicant thereof in writing.

(2) The decision on refusal to register the layout-design of an integrated circuit shall indicate

1) the time and place of making the decision;

2) a reference to the applicable laws;

3) the reason for the decision;

4) the decision;

5) an explanation regarding the procedure and term for filing an appeal against the decision;

6) the name and signature of the official who made the decision.

(3) The decision on refusal to register the layout-design of an integrated circuit enters into force on the day when it is made.

[Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) An applicant may file an appeal against a decision of the Patent Office with the Board of Appeal.

[RT I 2008, 59, 330 – entry into force 01.01.2009]

(2) [Repealed – RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(3) An applicant may file an appeal against a decision to register the layout-design of an integrated circuit made by the Patent Office, if the Patent Office has not deemed the date of the first commercial exploitation of the layout-design of the integrated circuit to be the date of commencement of legal protection.

(1) The register of layout-designs of integrated circuits (hereinafter register) is maintained on the basis of this Act and the Principles of Legal Regulation of Industrial Property Act and pursuant to the procedure provided for in said Acts.

(2) Notices concerning register entries are published in the official gazette of the Patent Office in the cases provided for in the Acts specified in subsection 1 of this section. The Patent Office may, in the public interest and pursuant to the procedure established in the statutes of the official gazette of the Patent Office, publish notices concerning other register entries and other information in the official gazette of the Patent Office the publication whereof is not prohibited or restricted on the basis of said Acts or international agreements.

[RT I 2004, 20, 141 – entry into force – 01.05.2004]

(1) If a registration application is accepted for processing, the filing date and number of the registration application and the receipt by the Patent Office of the documents submitted on the basis of § 19 of this Act and other documents submitted on the applicant's own initiative, and information contained in such documents pursuant to § 25 of the Principles of Legal Regulation of Industrial Property Act, shall be entered in the register.

(2) In the course of processing a registration application, information and notices concerning the procedural acts performed pursuant to this Act, documents received and issued, terms provided for in this Act and terms established by the Patent Office shall be entered in the register.

(3) Upon grant of legal protection for the layout-design of an integrated circuit, an entry of registration data shall be made in the register.

(4) An entry of registration data shall be made pursuant to § 34 of this Act on the basis of a decision to register the layout-design of an integrated circuit or, in the cases provided for in this Act, on the basis of a decision of the Board of Appeal or a court judgment.

(5) The following data are registration data

1) the registration number;

2) the date of registration;

3) the name of the layout-design of an integrated circuit;

4) information regarding the identification of the layout-design of the integrated circuit;

5) the given name, surname and address of the author of the layout-design of the integrated circuit;

6) the given name, surname and the address and country code of the residence or seat of the enterprise of the owner of the layout-design of the integrated circuit, or in the case of a legal person, the name, registered address and the country code;

7) the date from which the registration is valid;

8) the date on which the registration expires;

9) in the case of a patent attorney, the given name and surname of the patent attorney;

10) in the case of a joint representative who is a natural person, the given name and surname of the natural person, in the case of a joint representative who is a legal person, the name of the legal person;

11) the number of the registration application;

12) the filing date of the registration application;

13) the date of the first commercial exploitation of the layout-design of the integrated circuit.

(6) The applicant is entered in the register as the owner of the layout-design of the integrated circuit.

(7) The Patent Office publishes notices of entries of registration data in the official gazette of the Patent Office. The publication date of the notice shall be entered in the register.

(8) A registration shall enter into force on the publication date of the notice of entry of registration data in the official gazette of the Patent Office.

[RT I 2004, 20, 141 – entry into force 01.05.2004]

Registration of the layout-design of an integrated circuit is valid retroactively as of the filing date of the registration application or the date of the first commercial exploitation if the layout-design of the integrated circuit is, before the filing date of the registration application, commercially exploited for the first time in any part of the world during the period provided for in subsection 1 of § 8 of this Act; and the registration is valid for ten years from the last day of the year of commencement of the validity of registration.

–

[Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) No information is released from the register concerning an author if the author has prohibited the disclosure of the author’s name.

(2) Prior to the publication of a notice of the entry of registration data, access to a registry file is granted to the applicant, persons who have written consent of the applicant, or a person who proves that applicant intends to resort to legal remedies against the person after registration.

(3) After the publication of a notice of entry of registration data, the register is public. Everyone has the right to have access to the registry file and data entered in a record, except in the case of the restriction specified in subsection 1 of this section.

(4) In order to have access to a registry file or receive written information, copies or printouts from the register, a written application must be submitted and the statutory fee must be paid. Access to the microcircuit topology registry file is free of charge for the applicant and the owner of the layout-design of an integrated circuit.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(5) The procedure for access to the register and release of information from the register shall be established by the minister in charge of the policy sector.

[RT I, 28.12.2011, 1 – entry into force 01.01.2012]

–

[Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) After the publication of a notice of registration of a layout-design of an integrated circuit in the official gazette of the Patent Office, the Patent Office shall issue a certificate of the layout-design of the integrated circuit to the owner of the layout-design of the integrated circuit.

(1¹) On the basis of a request by the owner of the layout-design of the integrated circuit, a paper copy of the electronic of the certificate of the layout-design of the integrated circuit is issued to them. A state fee must be paid for the issue of the copy. The copy is issued within one month from the date of filing of the request, but not before payment of the required state fee.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(2) [Repealed – RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(3) A duplicate of the certificate of the layout-design of the integrated circuit may be issued on the basis of a request from the owner of the layout-design of the integrated circuit. A state fee must be paid for the issue of a duplicate. The duplicate is issued within one month from the date of submission of the request, but not before payment of the required state fee.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(4) The requirements for the format and the procedure for the issue of certificates of layout-designs of integrated circuits shall be established by the minister in charge of the policy sector.

[RT I, 28.12.2011, 1 – entry into force 01.01.2012]

[Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

In the cases provided for in this Act, a state fee must be paid for the review of a registration application for registration, issue of information and performance of other acts at the rate provided in the State Fees Act.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(1) After accepting the registration application for processing or after the filing of the request, the Patent Office notifies the applicant or the person submitting the request of the unique reference number for payment of the state fee. The unique reference number is not communicated if the person has already paid the state fee for the act.

(2) Where the state fee is paid by means of a unique reference number, the payment document must indicate the unique reference number which relates to the act for which the state fee is paid.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(1) Where the state fee is paid without a unique reference number, the applicant, the owner of the layout-design of the integrated circuit or any other person requesting an act to be performed in relation to the legal protection of the layout-design of the integrated circuit submits to the Patent Office, by the due date for payment of the state fee, the following information concerning the payment of the state fee

1) number of the payment document;

2) date of payment;

3) name of the payer;

4) amount paid;

5) name of the act for which the state fee is paid, or the number of the relevant section of the State Fees Act;

6) registration application number, the registration number or, in their absence, any other data enabling the layout-design of the integrated circuit to be identified.

(2) The data specified in subsection 1 of this section are to be provided separately for each registration application or registration and for each act. Where the state fee is paid for more than one act at a time, a list is to be submitted with the breakdown of the paid amount between the registration applications or registrations and acts.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(1) A state fee is deemed to have been paid if it has been credited to the prescribed account on the basis of a unique reference number, or if the information specified in subsection 1 of § 473 of this Act has been submitted to the Patent Office concerning the payment of the state fee.

(2) Where the state fee is payable by a specified due date, it is also deemed to have been paid on time if the state fee in the prescribed amount has been credited to the prescribed account on the basis of a unique reference number within three banking days of the issuance of the unique reference number by the Patent Office.

(3) Where the information on the payment of the state fee has been submitted by the due date for payment, but the state fee has not been received in the required amount, the Patent Office may, in order to verify the payment, request the person submitting the information to submit a document certified by a banking institution as proof of payment of the state fee.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(1) An applicant may transfer a registration application which is being processed by the Patent Office to another person.

(2) A registration application which is being processed by the Patent Office transfers to a legal successor.

(3) In order to amend the data on the applicant in a registration application, the applicant or the transferee of the registration application must file a request with the Patent Office and pay the state fee. If the request is filed by the transferee of the registration application, the request must be accompanied by a document certifying the transfer.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(4) The Patent Office shall amend the data specified in clause 5 of § 20 of this Act in the registration application.

(5) A registration application is deemed to be transferred to another person from the date on which the data are amended.

(1) The owner of the layout-design of an integrated circuit may transfer the owner’s rights to another person.

(2) The rights of the owner of the layout-design of an integrated circuit transfer to a legal successor.

(3) In order to amend the data regarding the owner of the layout-design of an integrated circuit in a registration, the owner of the layout-design of the integrated circuit or the person to whom the rights of the owner of the layout-design of the integrated circuit are transferred must file a request with the Patent Office and pay the state fee. If the request is filed by the person to whom the rights of the owner of the layout-design of the integrated circuit are transferred, the request must be accompanied by a document certifying the transfer.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(4) The request specified in subsection 3 of this section shall be filed within one year of the date on which the rights specified in the transaction are transferred or of the date of creation of legal succession. If the rights of the owner of the layout-design of an integrated circuit are transferred pursuant to a decision of the Board of Appeal or a court judgment, the request shall be filed within one month of the date on which the decision of the Board of Appeal or the court judgment enters into force.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(5) [Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(6) The rights of the owner of the layout-design of an integrated circuit are deemed to be transferred to another person from the date of transfer of the rights pursuant to a transaction or a decision of the Board of Appeal or a court judgment, or from the date of creation of legal succession.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(7) The person to whom the rights of the owner of a layout-design of an integrated circuit are transferred pursuant to the provisions of this section may exercise such rights from the date on which the entry on the amendment of registration data becomes valid. An entry becomes valid on the date on which it is made. An entry shall have legal effect with regard to a third person as of the date on which a notice of the making of the registry entry is published in the official gazette of the Patent Office.

[RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) The owner of the layout-design of an integrated circuit (licensor) may, by way of a licence, grant the use of the rights of the owner of the layout-design of an integrated circuit specified in § 15 of this Act to one or several persons (holder of rights or licensee) in part or in full.

(2) With the consent of a licensor, a licensee may, by way of a sublicense, transfer the rights deriving from a licence to a third person.

(3) The term of a licence shall not be longer than the term of the legal protection of the layout-design of an integrated circuit.

(4) Licences may be registered in the register.

(5) If there is a conflict of rights granted by different licences to several licensees, preference is given to the licensee whose licence is registered.

(6) An unregistered licence has no legal force with respect to third persons.

(7) A written licence agreement shall be entered into upon the issue of a licence.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

(1) [Repealed – RT I 2002, 53, 336 – entry into force 01.07.2002]

(2) [Repealed – RT I 2002, 53, 336 – entry into force 01.07.2002]

(3) If, in the cases provided for in § 49 of this Act, the rights of the owner of the layout-design of an integrated circuit transfer to another person, also the rights and obligations deriving from a licence are transferred.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

(1) In order to register a licence, the licensor or licensee must file a request together with the licence agreement or a copy thereof with the Patent Office, and pay the state fee.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(2) An application for registration of a licence shall set out

1) the name and residence or seat of the licensor;

2) the name and residence or seat of the licensee;

3) the object of the licence;

4) the list of rights conferred on the licensee;

5) the term of the licence;

6) other information which the licensor or licensee deems necessary to be entered in the register.

(3) Instead of a licence agreement or a copy thereof, an extract of the licence agreement containing the data specified in subsection 2 of this section may be filed with the Patent Office.

[RT I, 06.01.2023, 2 – entry into force 31.08.2023]

(4) The Patent Office shall make an entry in the register concerning registration of a licence.

(5) An entry on registration of a licence is deleted from the register at the end of the term of the licence or by agreement of the licensor and the licensee.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

(1) The rights of the owner of the layout-design of an integrated circuit extinguish upon expiry of the registration pursuant to § 40 of this Act.

(2) The rights of the owner of the layout-design of an integrated circuit extinguish prior to the date provided for in § 40 of this Act

1) if the owner of the layout-design of an integrated circuit waives the rights of the owner without transferring the owner’s rights to another person;

2) [repealed – RT I 2002, 53, 336 – entry into force 01.07.2002]

3) [repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

4) on the basis of a decision of the Board of Appeal or a court judgment which has entered into force and which declares the registered layout-design of the integrated circuit to be contrary to the provisions of subsection 1–4 of § 8 of this Act;

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

5) on the basis of a decision of the Board of Appeal or a court judgment which has entered into force and which declares that the owner specified in the registration had no right to apply for registration of the layout-design of the integrated circuit pursuant to subsections 1 and 2 of § 12 of this Act, and the person who pursuant to the decision of the Board of Appeal or the court judgment is declared the owner of the layout-design of the integrated circuit has failed to file a request for amendment of the registration data regarding the owner of the layout-design of the integrated circuit pursuant to the procedure prescribed in subsections 3 and 4 of § 49 of this Act.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(3) The making of an entry in the register on deletion of a registration constitutes the basis for the extinguishment of the rights of the owner of the layout-design of an integrated circuit.

[RT I 2004, 20, 141 – entry into force 01.05.2004]

[RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) The Patent Office shall make the entry on deletion of a registration on the basis of the provisions of subsection 1 of § 53 of this Act within five working days after the expiry of the registration pursuant to § 40 of this Act.

(2) In order to make an entry on deletion of a registration in the cases specified in clauses 1, 4 and 5 of subsection 2 of § 53 of this Act, the owner of the layout-design of an integrated circuit or an interested person shall file a request with the Patent Office. If a request is filed by an interested person, documents supporting the claim shall be appended to the request.

(3) The Patent Office shall refuse to make an entry on deletion of a registration pursuant to the provisions of clause 1 of subsection 2 of § 53 of this Act if the rights of the owner of the layout-design of an integrated circuit are the object of a registered licence.

(4) [Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

(1) Upon the making of an entry on deletion of a registration pursuant to the provisions of subsection 1 of § 53 of this Act, the rights of the owner of the layout-design of an integrated circuit extinguish on the date of expiry of the registration.

(2) Upon the making of an entry on deletion of a registration pursuant to the provisions of clause 1 of subsection 2 of § 53 of this Act, the rights of the owner of the layout-design of an integrated circuit extinguish on the date following the date on which such entry is made.

(3) After the deletion of a registration from the register, all persons have the right to reproduce and commercially exploit the layout-design of the integrated circuit. Such right is retroactive to the date on which the rights of the owner of the layout-design of the integrated circuit expired.

(1) Authorship disputes are resolved after the registration of the layout-design of the integrated circuit.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(2) Any natural person who considers that he or she is the author of the layout-design of an integrated circuit pursuant to § 10 of this Act may file a request with the Board of Appeal for recognition of his or her authorship against the owner of the layout-design of the integrated circuit.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(3) Authorship may be contested by the author or his or her successor.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(4) Where authorship of a person is recognised, the person may contest the owner of the layout-design of an integrated circuit in the same processing pursuant to subsection 1 of § 57 of this Act.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(5) A participant in a processing concerning the request specified in subsection 2 of this section who is not satisfied with a decision of the Board of Appeal, may file an action against another participant in the processing within the term specified in subsection 1 of § 64 of the Principles of Legal Regulation of Industrial Property Act.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(1) A person who finds that the rights of the owner of the layout-design of an integrated circuit belong him or her pursuant to subsections 1, 2 and 3 of § 12 of this Act may file a request with the Board of Appeal for recognition of his or her rights against the owner of the layout-design of the integrated circuit.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(2) The request specified in subsection 1 of this section may be filed within one year after the publication date of the notice of entry of registration data.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(2¹) A participant in a processing concerning the request specified in subsection 2 of this section who is not satisfied with a decision of the Board of Appeal, may file an action against another participant in the processing for recognition of his or her rights within the term provided for in subsection 1 of § 64 of the Principles of Legal Regulation of Industrial Property Act.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(3) A person who finds that the person who became the owner of the layout-design of an integrated circuit had no right to file a registration application pursuant to subsection 4 of § 12 of this Act or to become the owner of the layout-design of the integrated circuit and that the registration hinders such person in the person’s economic or business activities, may file a request with the Board of Appeal against the owner of the layout-design of an integrated circuit to declare the registration unlawful.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(4) The request specified in subsection 3 of this section may be filed during the validity period of the registration.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(5) A participant in a processing concerning the request specified in subsection 3 of this section who is not satisfied with a decision of the Board of Appeal, may file an action against another participant in the processing to declare the registration unlawful or to ascertain the non-existence of the circumstances providing grounds therefor within the term provided for in subsection 1 of § 64 of the Principles of Legal Regulation of Industrial Property Act.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(6) The Patent Office shall make an entry in the register on the basis of the decision of the Board of Appeal or court judgment which has entered into force if the person specified in subsection 1 or 3 of this section submits a request including information on the decision or judgment which has entered into force, to the Patent Office.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(1) A person who finds that a registered layout-design of an integrated circuit does not conform to the provisions of subsections 1–4 of § 8 of this Act and that the registration hinders such person in the person’s economic or business activities, may file a request with the Board of Appeal against the owner of the layout-design of the integrated circuit for revocation of the registration.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(2) The request specified in subsection 1 of this section may be filed also after the registration has expired.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(2¹) A participant in a processing concerning the request specified in subsection 1 of this section who is not satisfied with a decision of the Board of Appeal, may file an action against another participant in the processing for revocation of the registration or for ascertaining the non-existence of the circumstances providing grounds therefor within the term provided for in subsection 1 of § 64 of the Principles of Legal Regulation of Industrial Property Act.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(3) The Patent Office shall make an entry in the register on the basis of the decision of the Board of Appeal or court judgment which has entered into force if the person specified in subsection 1 of this section submits a request including information on the decision or judgment which has entered into force, to the Patent Office.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(1) The author of the layout-design of an integrated circuit has a perpetual right to file an action in court upon infringement of the right provided for in subsection 1 of § 11 of this Act or for the establishment of any other right deriving from his or her authorship.

(2) [Repealed – RT I 2002, 53, 336 – entry into force 01.07.2002]

In the case of unlawful use of the layout-design of an integrated circuit, the owner of the layout-design of the integrated circuit may demand

1) compensation for damage caused by unlawful use of the layout-design of the integrated circuit pursuant to § 1043 of the Law of Obligations Act;

2) termination of the unlawful use of the layout-design of the integrated circuit and refraining from further violation pursuant to § 1055 of the Law of Obligations Act;

3) the transfer of that which has been received as a result of the unlawful use of the layout-design of the integrated circuit pursuant to §§ 1037 and 1039 of the Law of Obligations Act.

[RT I 2002, 53, 336 – entry into force 01.07.2002]

(1) Appeals and actions related to the legal protection, validity and unlawful use of the layout-design of an integrated circuit, petitions for the securing of an action and petitions for provisional legal protection, as well as other appeals and actions specified in this Act shall be heard by Harju County Court.

[RT I, 19.03.2019, 4 – entry into force 01.04.2019]

(1¹) [Repealed – RT I, 19.03.2019, 4 – entry into force 01.04.2019]

(1²) A person against whom an action has been filed pursuant to § 60 of this Act, is entitled to file a counterclaim with a claim specified in subsection 2 of § 56, subsection 1 or 3 of § 57 or subsection 1 of § 58.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

(2) A copy of a court decision which has entered into force concerning a dispute relating to the layout-design of an integrated circuit shall be immediately sent to the Patent Office.

[RT I 2005, 39, 308 – entry into force 01.01.2006]

[RT I 2005, 39, 308 – entry into force 01.01.2006]

(1) In resolution of a dispute related to the layout-design of an integrated circuit, a patent attorney may act as a representative in a county court and in a circuit court. In Supreme Court, a patent attorney may act as a representative only together with an attorney-at-law.

(2) [Repealed – RT I 2004, 20, 141 – entry into force 01.05.2004]

[Repealed – RT I, 12.07.2014, 1 – entry into force 01.01.2015]

[Repealed – RT I, 12.07.2014, 1 – entry into force 01.01.2015]

State fees

(1) Proceedings concerning an action filed pursuant to this Act before 1 April 2019 shall be conducted by a court even in case mandatory pre-trial procedure in the Board of Appeal is prescribed for the settlement of the respective dispute starting from said date.

(2) Proceedings concerning an appeal, petition or action filed with a court pursuant to this Act before 1 April 2019 shall be conducted by a county court other than Harju County Court even in case Harju County Court has exclusive jurisdiction over adjudication of the respective appeal, petition or action starting from said date.

[RT I, 19.03.2019, 5 – entry into force 01.04.2019]

–

[Omitted from this text]

This Act enters into force three months after the date of publication thereof in the Riigi Teataja.